The manufacture of printed circuit boards (PCBs) involves a succession of processing steps, some of which convert a circuit design of multiple layers to images, patterns, or circuits that will be transposed to a base material for subsequent processing into electrical inter-connections. The design may be directly imposed on a production medium or on a drawing or graphical representation medium. Most usually the design is converted to a digital data representation. Conversion to a digital data representation may be accomplished with commercially available Computer Aided Design (CAD) software. The CAD program, in concert with a computer aided manufacture (CAM) program, translates the design data to a “layout” of a series of items such as tracks, pads, interconnection holes, embedded components and solder masks to be placed on the base material which is in the form of a panel. The said items are referred to hereinafter as “features”. The layout is usually transposed to a medium called artwork although the layout may also be directly transposed via a digital imaging technique, for example a laser or inkjet. Ultimately, layers of the panel will be combined to make a PCB. Most PCB's are multi-layered.
In the fabrication of PCB's multiple layers of different materials are built up. Features are located in each of the layers and connections are made between them using a drilled hole that is made conductive. During fabrication dimensional changes occur in the base material resulting in a difference between the initial location of a feature and its actual location post manufacture. The spacing of features is particularly important so as to not to short out or interfere with adjacent features. Where interconnections are to be made between features located in different layers of the board it is vitally important that the features of each layer are correctly aligned. The process of aligning features located in different layers is referred to as registration. One of the problems associated with achieving accurate registration is that the manufacturing processes to fabricate a printed circuit board involve repeated heating and cooling of the board. This repeated heating and cooling, in particular when the inner layers are laminated together under temperature and pressure, causes distortion of the different layers of the board and the position of features located thereon. The removal of copper during the processing causes material movement as stresses built into the materials during manufacture are allowed to relax. As different layers of the board will have different copper designs and may be manufactured from different materials the extent to which layers distort may differ.
As the density of components and/or features on boards increases the importance of accurate registration increases. Currently industry standard minimum track widths are 100 micron. However, industry forecasts indicate that track widths will reduce to 5 microns in the future. Such a decrease in track width would result in a massive increase in track density. If this density were increased without providing for more accurate registration the amount of waste, i.e. boards that do not function correctly due to features not being connected properly, will increase substantially
Some attempts have been made to increase the accuracy of registration. For example, U.S. Pat. No. 6,581,202 describes a system and method of linear compensation in which targets are inserted throughout the layout of a PCB. Post manufacture measurement of the targets are compared to pre-manufacture position so as to calculate a non-linear regression analysis best fit model which is used to predict a feature's location upon or within a PCB given the feature's position. The non-linear regression analysis results in a set of x and y polynomial equations. These polynomial equations allow for a linear compensation to be applied to the feature position on a layout so as to minimize misregistration of features in the manufacture of PCBs.
U.S. Pat. No. 6,701,511 describes a method of adjusting preliminary feature position characteristics of a preliminary mask pattern to produce a desired etch pattern on a substrate. Adjustment distances are calculated based on numbers in a table computed on the basis of measurements made of a test pattern etched on a substrate which was previously manufactured by exposing a test mask.
U.S. Pat. No. 6,165,658 describes non-linear image distortion correction in printed circuit board manufacturing in which the complete conductor pattern of a layer is scanned by an image scanner after manufacture and compared with an initial map to create an error vector map. This vector map is used to correct the initial map to be used in further production.
U.S. Pat. No. 6,658,375 describes a compensation model based on experiments on experimental PCB boards, thereby generating coefficients for a polynomial equation used in calculating a linear compensation error to be applied to a CAD file.